Show simple item record

dc.contributor.authorAbuYasin, Thamer S.
dc.date.accessioned2021-10-06T19:24:05Z
dc.date.available2021-10-06T19:24:05Z
dc.date.issued2007-12-31
dc.identifier.urihttp://hdl.handle.net/1808/31932
dc.descriptionThesis (M.S.)--University of Kansas, Electrical Engineering & Computer Science, 2007.en_US
dc.description.abstractHandelC is a programming language used to target hardware and is similar in syntax to ANSI-C. HandelC offers constructs that allow programmers to express instruction level parallelism. Also, HandelC offers primitives that allow task level parallelism. However, HandelC does not offer any runtime support that enables programmers to express task level parallelism efficiently. This thesis discusses this issue and suggests a support library called HCthreads as a solution. HCthreads offers a subset of Pthreads functionality and interface relevant to the HandelC environment. This study offers means to identify the best configuration of HCthreads to achieve the highest speedups in real systems.

This thesis investigates the issue of integrating HandelC within platforms not supported by Celoxica. A support library is implemented to solve this issue by utilizing the high level abstractions offered by Hthreads. This support library abstracts away any HWTI specific synchronization making the coding experience quite close to software.

HCthreads is proven effective and generic for various algorithms with different threading behaviors. HCthreads is an adequate method to implement recursive algorithms even if no task level parallelism is warranted. Not only HCthreads offers such versatility, it achieves modest speedups over instruction level parallelism ad-hoc approaches. The Hthreads support library served its intended purpose by allowing HCthreads real system tests to proceed on a third party platform. No major issues were reported while conducting these tests, still additional investigation and verification is required.
en_US
dc.publisherUniversity of Kansasen_US
dc.rightsThis item is protected by copyright and unless otherwise specified the copyright of this thesis/dissertation is held by the author.en_US
dc.subjectApplied sciencesen_US
dc.subjectHandelCen_US
dc.subjectHw/sw co-designen_US
dc.subjectInstruction level parallelismen_US
dc.subjectPosix threadsen_US
dc.subjectTask level parallelismen_US
dc.titleEnabling task level parallelism in HandelCen_US
dc.typeThesisen_US
dc.thesis.degreeDisciplineElectrical Engineering & Computer Science
dc.thesis.degreeLevelM.S.
kusw.bibid6599337
dc.rights.accessrightsopenAccessen_US


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record