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Hardware/Software Co-Design via Specification Refinement
dc.contributor.advisor | Alexander, Warren P | |
dc.contributor.author | Peck, Wesley Graham | |
dc.date.accessioned | 2012-06-03T15:12:21Z | |
dc.date.available | 2012-06-03T15:12:21Z | |
dc.date.issued | 2011-12-31 | |
dc.date.submitted | 2011 | |
dc.identifier.other | http://dissertations.umi.com/ku:11919 | |
dc.identifier.uri | http://hdl.handle.net/1808/9769 | |
dc.description.abstract | System-level design is an engineering discipline focused on producing methods, technologies, and tools that enable the specification, design, and implementation of complex, multi-discipline, and multi-domain systems. System-level specifications are as abstract as possible, defining required system behaviors while eliding implementation details. These implementation details must be added during the implementation process and the high effort associated with this locks system engineers onto the chosen implementation architecture. This work provides two contributions that ease the implementation process. The Rosetta synthesis capability generates hardware/software co-designed implementations from specifications that contain low level implementation details. The Rosetta refinement capability extends this by allowing a system's functional behavior and its implementation details to be described separately. The Rosetta Refinement Tool combines the functional behavior and the implementation details to form a system specification that can be synthesized using the Rosetta synthesis capability. The Rosetta refinement capability is exposed using existing Rosetta language constructs that have, previous to this work, never been exploited. Together these two capabilities allow the refinement of high level, architecture independent specifications into low level, architecture specific hardware/software co-designed implementations. The result is an effective platform for rapid prototyping of hardware/software co-designs and provides system engineers with the novel ability to explore different system architectures with low effort. | |
dc.format.extent | 183 pages | |
dc.language.iso | en | |
dc.publisher | University of Kansas | |
dc.rights | This item is protected by copyright and unless otherwise specified the copyright of this thesis/dissertation is held by the author. | |
dc.subject | Computer science | |
dc.subject | Computer engineering | |
dc.subject | Co-design | |
dc.subject | Hardware | |
dc.subject | Refinement | |
dc.subject | Software | |
dc.subject | Specification | |
dc.title | Hardware/Software Co-Design via Specification Refinement | |
dc.type | Dissertation | |
dc.contributor.cmtemember | Gill, Andrew | |
dc.contributor.cmtemember | Kulkarni, Prasad | |
dc.contributor.cmtemember | Fu, Xin | |
dc.contributor.cmtemember | Bennett, Caroline | |
dc.thesis.degreeDiscipline | Electrical Engineering & Computer Science | |
dc.thesis.degreeLevel | Ph.D. | |
kusw.oastatus | na | |
kusw.oapolicy | This item does not meet KU Open Access policy criteria. | |
kusw.bibid | 7643176 | |
dc.rights.accessrights | openAccess |
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Dissertations [4889]
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Engineering Dissertations and Theses [1055]