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dc.contributor.advisorKulkarni, Prasad
dc.contributor.authorSengupta, Saikat
dc.date.accessioned2019-04-25T20:38:46Z
dc.date.available2019-04-25T20:38:46Z
dc.date.issued2018-12-31
dc.date.submitted2018
dc.identifier.otherhttp://dissertations.umi.com/ku:16272
dc.identifier.urihttp://hdl.handle.net/1808/27768
dc.description.abstractPresent day manufacturers have invented different memory technologies with distinct bandwidth, energy and cost trade-offs. Systems with such heterogeneous memory technologies can only achieve the best performance and power characteristics by appropriately partitioning process data on OS pages and placing OS pages in the right memory areas. To achieve effective data partitioning and placement we need to first understand how programs access memory and how those patterns change at various stages (phases) of program execution. The goal of this work is to build a framework, design experiments and conduct analysis to understand overall memory usage patterns across many programs. We use Intel’s Pin dynamic binary translation and instrumentation system for this work. Our Pin based framework instruments programs at run-time to collect data regarding memory allocations, de-allocations, reads and writes, which we then analyze using our specialized scripts. We collect and analyze information including page access counts, hot page ratio, memory read and write access patterns and how that varies in different program phases. We also analyze the similarities regarding memory behavior between distinct phases during program execution. We also study memory behavior both with cache and without cache to understand how caches affect the memory access behavior.
dc.format.extent86 pages
dc.language.isoen
dc.publisherUniversity of Kansas
dc.rightsCopyright held by the author.
dc.subjectComputer engineering
dc.subjectComputer science
dc.subjectAccess behavior
dc.subjectHeterogeneous Memory
dc.subjectIntel pinplay
dc.subjectMemory
dc.subjectMemory Pages
dc.subjectSimilarity Metric
dc.titleUnderstanding Memory Access Behavior for Heterogeneous Memory Systems
dc.typeThesis
dc.contributor.cmtememberGrzymala-Busse, Jerzy W.
dc.contributor.cmtememberAlexander, Perry
dc.thesis.degreeDisciplineElectrical Engineering & Computer Science
dc.thesis.degreeLevelM.S.
dc.identifier.orcidhttps://orcid.org/0000-0003-1124-3932
dc.rights.accessrightsopenAccess


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