|Nanotechnology holds exciting potential to significantly advance research in many fields such as sensors, environmental sustainability and cleanup, energy harvesting and storage, as well as nanoelectronics. The resulting high demand for implementation into these areas has simultaneously created a large need for effective fabrication methods for nanostructured materials. It is important the fabrication methods are capable of significant control over size, orientation, and structural configuration of nanomaterials for effective function in these applications. Nanopatterning and templating are a promising means to achieve extreme selectivity over these parameters, and additionally be used as tools to control the growth and structure of large-scale materials through nanoscale manipulation. In this research, nanopatterning and templating are implemented to create metallic nanowire structures on surfaces of silicon substrates with highly selectivity over nanowire placement and design. Additionally, templating is incorporated in graphene growth on metallic substrates to influence the quality of graphene films, and further film patterning is used to improve the graphene electrical and optical properties. The first part of this work focuses on the fabrication of copper metallic nanowires through resist patterning coupled with electroless copper deposition. An atomic force microscope is used to selectively remove portions of a self-assembled monolayer resist on a silicon substrate, with patterns reaching down to widths of 20 nm. Electroless metal plating provides a facile way to deposit metal in selectively activated areas on surfaces with nanoscale dimensions. Here, it is employed to deposit copper selectively within these nanopatterned lines to create copper nanowire features. Through variation of the electroless metal solution conditions, the dimensions of the AFM-patterned line, and the doping of the underlying silicon substrate, the dimensions and uniformity of copper deposition within AFM-patterned lines can be influenced. Furthermore, this method provides a successful level of control to construct copper nanowire features between gold microelectrodes, which allows the electrical properties of these nanowires to be examined. The ability to selectively place nanowire features on a substrate surface with dimensions down to the tens of nanometers, as well as the capability to manipulate the nanowire size and uniformity, make this a promising method to construct metallic nanofeatures for complex nanodevices and circuitry. The second portion of this research investigates techniques to develop high quality graphene films produced by chemical vapor deposition (CVD) on copper substrates. Chemical vapor deposition shows great potential for developing graphene films of large area, but unfortunately CVD graphene oftentimes possesses low conductivity values due to an increased amount of misaligned grain boundaries and point defects, and oftentimes exhibits low optical transparency. The focus of this research is to better understand the role the copper substrate plays in CVD graphene formation, and to find ways to directly enhance CVD graphene quality through changes in the copper substrate template. The surface morphology, optical transmittance, and electrical properties of CVD graphene manufactured on two copper substrates with different surface structures were investigated. It was found that differences in the copper substrate grain alignment and crystal lattice could significantly influence the deposition and quality of graphene on copper substrates. Furthermore, the possibility of developing graphene films on nonmetallic substrates, as well as enhancing its properties through chemical doping, is demonstrated by nanopatterning and templating of graphene films.