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dc.contributor.advisorPerrins, Erik S
dc.contributor.authorTunc, Muharrem Ali
dc.date.accessioned2014-11-18T06:33:37Z
dc.date.available2014-11-18T06:33:37Z
dc.date.issued2014-05-31
dc.date.submitted2014
dc.identifier.otherhttp://dissertations.umi.com/ku:13443
dc.identifier.urihttp://hdl.handle.net/1808/15782
dc.description.abstractPower line communication (PLC) has received steady interest over recent decades because of its economic use of existing power lines, and is one of the communication technologies envisaged for Smart Grid (SG) infrastructure. However, power lines are not designed for data communication, and this brings unique challenges for data communication over power lines. In particular for broadband (BB) PLC, the channel exhibits linear periodically time varying (LPTV) behavior synchronous to the AC mains cycle. This is due to the time varying impedances of electrical devices that are connected to the power grid. Another challenge is the impulsive noise in addition to power line background noise, which is due to switching events in the power line network. In this work, we focus on two major aspects of an orthogonal frequency division multiplexing (OFDM) system for BB PLC LPTV channels; bit and power allocation, and channel estimation (CE). First, we investigate the problem of optimal bit and power allocation, in order to increase bit rates and improve energy efficiency. We present that the application of a power constraint that is averaged over many microslots can be exploited for further performance improvements through bit loading. Due to the matroid structure of the optimization problem, greedy-type algorithms are proven to be optimal for the new LPTV-aware bit and power loading. Significant gains are attained especially for poor (i.e. high attenuation) channel conditions, and at reduced transmit-power levels, where the energy per bit-transmission is also low. Next, two mechanisms are utilized to reduce the complexity of the optimal LPTV-aware bit loading and peak microslot power levels: (i) employing representative values from microslot transfer functions, and (ii) power clipping. The ideas of LPTV-aware bit loading, complexity reduction mechanism, and power clipping are also applicable to non-optimal bit loading schemes. We apply these ideas to two additional sub-optimal bit loading algorithms that are based on even-like power distribution for a portion of the available spectrum, and demonstrate that similar gains in bit rates are achieved. Second, we tackle the problem of CE for BB PLC LPTV channels. We first investigate pilot based CE with different pilot geometry in order to reduce interpolation error. Block-type, comb-type, and incline type pilot arrangements are considered and a performance comparison has been made. Next we develop a robust CE scheme with low overhead that addresses the drawbacks of block-type pilot arrangement and decision directed CE schemes such as large estimation overhead for block-type pilot geometry, and difficulty in channel tracking in the case of sudden changes in the channel for decision directed approaches. In order to overcome these drawbacks, we develop a transform domain (TD) analysis approach to determine the cause of changes in the channel estimates, which are due to changes in the channel response or the presence of impulsive noise. We then propose a robust CE scheme with low estimation overhead, which utilizes pilot symbols placed widely apart and exploits the information obtained from TD analysis as a basis for switching between various CE schemes. The overhead of the proposed scheme for CE is low, and sudden changes in the channel are tracked affectively. Therefore, the effects of the LPTV channel and the impulsive noise on CE are mitigated. Our results indicate that for bit and power allocation, the proposed reduced complexity LPTV-aware bit loading with power clipping algorithm performs very close to the optimal LPTV-aware bit loading, and is an attractive solution to bit loading in a practical setting. Finally, for the CE problem, the proposed CE scheme based on TD analysis has low estimation overhead, performs well compared to block-type pilot arrangement and decision directed CE schemes, and is robust to changes in the channel and the presence of impulsive noise. Therefore, it is a good alternative for CE in BB PLC.
dc.format.extent109 pages
dc.language.isoen
dc.publisherUniversity of Kansas
dc.rightsThis item is protected by copyright and unless otherwise specified the copyright of this thesis/dissertation is held by the author.
dc.subjectElectrical engineering
dc.subjectChannel estimation
dc.subjectImpulsive noise
dc.subjectLPTV channel
dc.subjectOFDM bit loading
dc.subjectPower line communication
dc.subjectSmart Grid
dc.titleLPTV-Aware Bit Loading and Channel Estimation in Broadband PLC for Smart Grid
dc.typeDissertation
dc.contributor.cmtememberBlunt, Shannon D
dc.contributor.cmtememberSterbenz, James P.G.
dc.contributor.cmtememberLiu, Lingjia
dc.contributor.cmtememberStefanov, Atanas
dc.thesis.degreeDisciplineElectrical Engineering & Computer Science
dc.thesis.degreeLevelPh.D.
dc.rights.accessrightsopenAccess


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